In a digital system, the data are customarily stored and/or transmitted in the form of binary values called bits. These data may be affected by faults which may give rise to operating errors and ultimately the failure of the system in the absence of any correction mechanism or masking.
In order to guarantee an acceptable level of integrity for the data stored or transmitted, certain electronic systems use codes, customarily designated by the acronym ECC standing for the expression “Error Correcting Codes”. For this purpose, the data are encoded during the writing of said data to a storage system or during the transmission of said data through a system of interconnections. During the encoding of the data with an ECC code, check bits are added to the data bits so as to form code words.
In order to allow the correction of errors which affect up to n bits in the words of an ECC code, these code words must be separated by a minimum Hamming distance of 2n+1. To also allow the detection of errors which affect N+1 bits, apart from the correction of the errors affecting up to n bits, in the code words of an ECC, these code words must be separated by a minimum Hamming distance of 2n+2.
The code words of a linear corrector code are defined with the aid of a control matrix H. A binary vector V is a code word only if its product with the matrix H generates a zero vector. A code word V of a linear corrector code is checked by evaluating the matrix product H·V. The result of this operation is a vector called a syndrome. If the syndrome is a zero vector, the code word V is considered to be correct. A non-zero syndrome indicates the presence of at least one error. If the syndrome makes it possible to identify the positions of the affected bits, the errors affecting the code word can be corrected.
Various linear ECC codes exist with different error detection and correction capabilities. By way of example, a Hamming code makes it possible to correct a single error, that is to say an error which affects a single bit. This correction capability is dubbed SEC, the acronym standing for the expression “Single Error Correction”. The words of an SEC code are separated by a minimum Hamming distance of 3.
Another example of ECC code is the DEC code, the acronym standing for the expression “Double Error Correction”, which allows the correction of double errors, that is to say of errors affecting two bits in a code word. Quite obviously, the codes of this family are also capable of correcting all single errors. The words of a DEC code are separated by a minimum Hamming distance of 5.
This difference between the correction capability of an SEC code and that of a DEC code is due to an increase in the number of check bits in the case of a DEC code. For example, for eight data bits an SEC code needs four check bits while a DEC code needs eight check bits. Such a 100% increase in the number of check bits may be prohibitive because of the impact on the area of the components, their efficiency, their consumption and ultimately their cost.
Now, memories manufactured with the aid of emerging technologies, such as MRAMs, the acronym standing for the expression “Magnetic Random Access Memory”, may be affected by a significant rate of transient and/or permanent errors. For these types of memories, the correction capability of SEC codes is too low and DEC codes remain too expensive. In such situations, innovative masking solutions and/or corrections are necessary.